This invention relates generally to integrated circuit filters. More particularly, the present invention relates to integrated filter circuits for use at the input to or within logic circuits or systems.
A prior art filter circuit 10 is shown in FIG. 1. An integrator includes a resistor 12 and capacitor 14, although other more sophisticated integrators can be used, such as an analog ramp generator or digital counter-based integrator. A logic input signal, V.sub.IN, is coupled to the input node 18 of the integrator. An intermediate analog signal, designated "schmin" is generated at node 20, which is the integrated input signal. A Schmitt trigger conditioning circuit 16 is coupled to node 20 to receive the integrated analog signal. A logic output signal is generated at output node 22 by Schmitt trigger 16.
The prior art filter circuit 10 is useful for eliminating only certain types of noise or glitches. With reference to the timing diagrams of FIGS. 2 and 3, it can be shown that a constant stream of noise pulses or "glitches" will not be filtered and will eventually lead to the occurrence of a false output signal. In FIG. 2, an input signal V.sub.IN is shown as a series of positive-going noise pulses, all of which pulses are desirably filtered out by a filter circuit. Input signal waveform 18A is a stream of noise pulses terminating at a "one" logic state, whereas input signal waveform 18B returns to a "zero" logic state. The analog integrated voltage of node 20 is labeled SCHMIN in FIG. 2, and includes corresponding waveforms 20A and 20B. In operation, the SCHMIN voltage is charged and discharged according to change in polarity of the input noise signal. Eventually, the SCHMIN voltage periodically charges to the maximum available voltage, because of the duty cycle of the input signal. The maximum available voltage is the one logic state of the input voltage, typically the supply voltage of five volts. Waveform 20A shows the SCHMIN voltage finally charging to the supply voltage in response to the input signal staying at the one logic state, whereas waveform 20B shows the SCHMIN voltage discharging to zero volts in response to the input signal returning to the zero logic state. The Schmitt trigger 16 is characterized by having two distinct input threshold states, one for increasing input voltages, and another for decreasing input voltages. As the SCHMIN voltage is charged, at some time t1 the voltage crosses the input threshold voltage of Schmitt trigger 16, and a false output signal V.sub.OUT is generated. Output signal waveform 22A remains high, while output signal waveform 22B returns to a zero logic state as the discharging SCHMIN voltage crosses the second input threshold voltage of Schmitt trigger 16. In FIG. 3, an input signal V.sub.IN is shown as a series of negative-going noise pulses, all of which pulses are desirably filtered out by a filter circuit. Input signal waveform 18C terminates in a zero logic state, whereas input signal waveform 18D terminates with the stream of noise pulses returning to a one logic state. The SCHMIN voltage charges and discharges in response to the input signal and eventually periodically discharges to the minimum available voltage, because of the duty cycle of the input signal. The minimum available voltage is the zero logic state of the input voltage, typically ground. Waveform 20C shows the SCHMIN voltage finally discharging to ground in response to the input signal staying at the zero logic state, whereas waveform 20D shows the SCHMIN voltage charging back to the supply voltage in response to the input signal returning to the one logic state. As the SCHMIN voltage is discharged, at some time t1 the voltage crosses the input threshold voltage of Schmitt trigger 16, and a false output signal V.sub.OUT is generated. Output signal waveform 22C remains low, while output signal waveform 22D returns to a one logic state as the charging SCHMIN voltage crosses the other input threshold voltage of Schmitt trigger 16.
What is desired, therefore, is a filter circuit that is able to filter out multiple glitches or noise pulses that are closely spaced in time without generating a false output signal.